system in package sigal integrity

System-in-Package(SiP)ConferenceNavigatingSiPintheFablessEnvironmentSiPCONFERENCE–TUTORIALTRACKB-1SiPCo-DesignFlow/Modeling&SimulationforSiPAmitP.Agrawal,Ph.D.BroadcomCorporationJanuary23,2007PAGE3System-in-Package(SiP)SignalIntegrityAmitP.Agrawal,[e-mail],SanJose,CASiPConference,January23-24,2007PAGE4SeminarOutline•Introduction–DrivingFactorsinSiP–SystemLevelOverview•ElectricalFundamentalsinSiPDesign–LumpedVsDistributedLines–LossyTransmissionLines•SiPElectricalPerformanceParameters–ReflectionNoise–CrosstalkNoise–SimultaneousSwitchingNoise–ReturnPathNoise–PowerDistributionDesignConsideration•SiPModelingTools•ReferencesPAGE5DrivingFactorsforSiP•DeviceMiniaturization(heightandwidth)•Density(ICs,passives)•HighPerformance•LowerCostRef:AmkorPAGE6Questions?•Whatdoweneedmodel?•Howshoulditbemodeled?•Howmuchaccurateisthemodel?•WhataretheTools?•Doesthesystemwork?PAGE7System:Chip-SiP-PCBSiPSiPPCBoardPAGE8InterconnectComplexityShortCircuitCRCRLCTLineAntenna20010002000Speed(MHz)1971199820002004CoreBusInterconnectModelingPAGE9ElectricalPerspectiveofSystemSiPDesignLogicCircuitTechnologyNoiseImmunityPropagationSpeedCircuitCount#ofpinoutsDCPowerCoupledNoiseDelta-INoliseReflectiveNoiseDielectricMediumSignalRiseTimeDegradationPathLengthChipPitchSkinEffect/DielectricLossesResistiveLossesWiringCapacityandI/OEscapeDCResistanceZ0ControlDistancetoadjacentlinesandplanesPowerDistributionElectricalFundamentalsinSiPDesignPAGE11TransmissionLinesvs.LumpedParametersTrT=1/FT=TOFInTimeDomain:-LumpedElements:TOFTr/3-TransmissionLines:TOFTr/3InFrequencyDomain:-LumpedElements:lengthλ/10-TransmissionLines:lengthλ/10BW(GHz)=0.35/Tr(ns)CriticalLength,;rTrlε10≥Tr(ns)criticallength(cm)Criticallength(cm)0.050.240.160.10.490.320.52.441.6214.883.25MaterialFR4(Er=4.2)Ceramic(Er=9.5)PAGE12LossyTransmissionLinesCLZo/=ComplexPropagationConstant))((jwCGjwLR++=γIdealTransmissionLineβαγj+=αisattenuationconstant,βisphaseconstant,βwvp=Where,αdcisattenuationduetoDCresistance,αskinisattenuationduetoskineffectαdisattenuationduetodielectriclossesdskindcαααα++=)2/()2/()2/(GZoZoRZoRskindc++=LCvp1=Where,ZoischaracteristicImpedancevpisphasevelocityPAGE13ConceptofSkin-EffectResistanceAtfrequenciessuchthattheskindepthislargerorcomparablewiththeconductorthickness,thecurrentdistributesuniformlyovertheconductorcrosssection.Itgivesrisethedcresistanceoftheline.Athighfrequencies,wheretheskindepthissmallerthantheconductorthickness,thecurrentcrowdingaroundtheperimeterOccurs.Thecurrentcrowdingareagivesrisetheskin-effectresistanceSkindepth:μ=4πx10-7H/m,andσ(Cu)=5.88x10-7Mho/m,δ=2um@1GHz=1um@4GHzforcopperSkindepthμσπδf1=@lowfrequency@highfrequencyUsewidertracesathighspeedsignalstoreduceskin-effectlossesPAGE14StepSignalonaLossyLineLoss-lesslinedcresistivelineWithskineffectWithdielectriclossesTotalRisetimedegradationPAGE15DispersiononLossyTransmissionLinesSincethephasevelocity,vpandattenuation,αaredifferentateveryfrequency,sotheshapeofthetimedomainwaveformmustchangeasitmovesalongtheline.Attenuationisstrongerathigherfrequencies,sothewaveformtendstospread,ordisperse.Thiseffectduetolossesiscalleddispersion.SendingendReceivingendDispersioncontributestoISISiPElectricalPerformanceParametersPAGE17ReflectionNoise:ImpedanceMismatchSiPSiPPCBoardZo1Zo2010201021ZZZZ+−=ρ020102012ZZZZ+−=ρViVi+ρ1ViVoltageReflectionCoefficientsPAGE18DesignConsiderationstoReduceReflectionNoise•Maintainthesameimpedanceatthetransitions•Avoidabruptchangeinthelinewidth•Minimizebendsontrace,avoid90degreebends.•Maintainsymmetryofanydiscontinuityinboththelinesofthedifferentialpair•Minimizetheplatingtracelengths.Forhigh-speeddifferentialpairs,avoidtheplatingtraces•Nearthewirebondarea,usepowerandgroundwiresadjacenttothehigh-speedsignalsPAGE19CrosstalkInducedNoisePAGE20DesignTechniquesforCross-talkReduction•Increasespacingamongsignallines•Reducethelengthofparallellinesthatarecoupled•Reducedielectricspacingbetweensignallinesandgroundplane•Bringground/powerlinesinbetweenthesignallines•Avoidroutingoverplanecut-outs•Inthedie-padring,havegoodsignaltopower/groundratio•Intheballmap.Havegoodsignaltopower/groundratio•Uselowdielectricconstantmaterial•Usestriplinestructure•UseslowerrisetimePAGE21SSN:SwitchingfromLowtoHigh•Whenanumberofoutputdriversswitchatthesametimefromlowtohigh,thereisanimmediatedemandofcurrentbyallthedriverstochargetheoutputload.ThiscurrentflowsfromthepowersupplyonthePCBtothedriversonthechip.Thepathhasinductance,andtheinstantaneouscurrentdemandwillinduceavoltageonthisinductor.Thisinducedvoltagewillcauseadiponthepower(powerdroop)atthedriver.Ifthisdipistoolarge,itreducesthevoltagemargin,andalsothetimingisshiftedfortherisingedge.0VoltagedroopWaveformseenatThereceiverGroundBounceΔV=NLdi/dtPAGE22•Similarly,whenanumberofoutputdriversswitchatthesametimefromhightolow,thereisacurrentflowfromtheloadtothedrivers,thentoground.Thepathfromthedrivergroundtothepowersupplyhasinductance,referredtoasgroundinductance.Theinstantaneouscurrentonthisinductivepathwillinduceavoltage.Thisvoltagewillcau