基于功能信息的验证工程学及若干验证技术研究

合肥工业大学博士学位论文基于功能信息的验证工程学及若干验证技术研究姓名：张多利申请学位级别：博士专业：精密仪器及机械指导教师：高明伦20050301基于功能信息的验证工程学及若干验证技术研究作者：张多利学位授予单位：合肥工业大学参考文献(159条)1.参考文献2.ThomasLAndersonDesignintentsraiseverificationlevel20013.VSIAllianceTMTaxonomyofFunctionalVerificationForVirtualComponentDevelopmentandIntegrationVersion1.220014.PrakashRashinkar.PeterPaterson.LeenaSinghSystem-on-a-chipverification:methodologyandtechniques5.韩俊刚.杜慧敏国家自然科学基金研究专著《数字硬件的形式化验证》6.RCollettPanel:ComplexSystemVerification:TheChallengeAhead19947.FarzanFallah.SrinivasDevadas.KurtKeutzerOCCOM:EfficientComputationofObservability-BasedCodeCoverageMetricsforFunctionalVerification19988.JianShenEffectivetechniquesforprocessorvalidationandtest19999.PraveenYalagandula.VigyanSinghal.AdnanAzizAutomaticLighthouseGenerationforDirectedStateSpaceSearch200010.MalayKCanai.AdnanAzizEnhancementstoInvariantVerificationusingSIVA199911.MalayKGanai.AdnanAziz.AndreasKuehlmannEnhancingSimulationwithBDDsandATPG199912.JunYuan.JianShen.JacobAbraham.AdnanazizOnCombiningFormalandInformalVerification199713.MGanai.PYalagandula.AAziz.A.Kuehlmann,V.SinghalSIVAASystemforCoverageDirectedStateSpaceSearch2001(02)14.CHanYang.DavidLDillvalidationwithguidedsearchofthestatespace199815.ChrisWilson.DavidLDillReliableVerificationUsingSymbolicSimulationwithScalarValues200016.JuliaDushina.MikeBenjamin.DanielGeistSemi-FormalTestGenerationwithGenevieve200117.DongWang.Pei-HsinHoFormalPropertyVerificationbyAbstractionRefinementwithFormal,SimulationandHybridEngines200118.ValeriaBertacco.KunleOlukotunEfficientStateRepresentationforSymbolicSimulation200219.Pei-HsinHo.ThomasShiple.KevinHarer.JamesKukulasmartsimulationusingcollaborativeformalandsimulationengines200020.李暾.郭阳.李思昆交互状态机模型模拟矢量自动生成方法[期刊论文]-软件学报2003(3)21.DanielGeist.AlanHartman.GerardMas.RalphSmeets,MikeBenjaminAStudyinCoverage-DrivenTestGeneration199922.DanielLewin.DeanLorenz.ShmuelUrAMethodologyforProcessorImplementationVerification199623.GillyNativ.StevenMittermaier.ShmuelUr.AviZivCostEvaluationofCoverageDirectedTestGenerationfortheIBMMainframe200124.ShmuelUr.YoavYadinCoverageDrivenProcessorTestGeneration:ProofofConcept25.ShmuelUr.YaovYadinMicroArchitectureCoverageDirectedGenerationofTestPrograms199926.LaurentFournier.YaronArbetman.MosheLevingerFunctionalVerificationMethodologyforMicroprocessorsUsingtheGenesysTest-ProgramGenerator199927.MLajolo.LLavagno.MRebaudengoAutomaticTestBenchGenerationforSimulation-basedValidation200028.AharonAharon.DaveGoodmanTestProgramGenerationforFunctionalVerificationofPowerPCProcessorsinIBM199529.GertJervan.PetruEles.ZeboPengAHierarchicalTestGenerationTechniqueforEmbeddedSystems199930.ChenWang.SudhakarMReddyConflictdriventechniquesforimprovingdeterministictestpatterngeneration200231.JunYuan.KenAlbin.AdnanAziz.CarlPixleySimplifyingBooleanConstraintSolvingForRandomSimulation-VectorGeneration200232.DavidVanCampenhout.TrevorMudge.JohnPHayesHigh-levelTestgenerationfordesignverificationofpipelinedmicroprocessor199533.KDJones.JPPriviteraTheAutomaticGenerationofFunctionalTestVectorsforRambusDesigns199634.lndradeepGhosh.SrivathsRavlOnAutomaticGenerationofRTLValidationTestBenchesUsingCircuitTestingTechniques200335.HussainAl-Asaad.DavidVanCampenhoutHigh-LevelDesignVerificationofMicroprocessorsviaErrorModeling199836.FabrizioFerrandi.FrancoFummi.LucaGerli.DonatellaSciutoSymbolicfunctionalvectorgenerationforVHDLspecifications199937.RHenftling.AZinn.MBauer.W.Ecker,M.ZambaldiPlatform-basedTestbenchGeneration200338.XChen.HHsieh.FBalarin.Y.WatanabeAutomaticGenerationofSimulationMonitorsfromQuantitativeConstraintFormula200339.SébastienRegimba.Jean-FrancoisLemireAspectpartitioningforhardwareverificationreuse200240.ShaiFine.AviZivCoverageDirectedTestGenerationforFunctionalVerificationusingBayesianNetworks200341.JunYuan.KenAlbin.AdnanAziz.CarlPixleyConstraintSynthesisforEnvironmentModelinginFunctionalVerification200342.RenateHenftling.AndreasZinnRe-Use-CentricArchitectureforaFullyAcceleratedTestbenchEnvironment200343.AlessandroFin.FrancoFummiAVHDLErrorSimulatorforFunctionalTestGeneration200044.AartiGupta.SharadMalik.PranavAsharTowardformalizingavalidationmethodologyusingsimulationcoverage199745.RichardCHo.CHanYang.MarkAHorowitz.DavidL.Dillarchitecturevalidationforprocessors199546.byeongeonminRegister-transfer-leveldesignverificationCoverageandacceleration47.KohnoKazuyoshiANewVerificationMethodologyforComplexPipelineBehavior200148.Chung-YangHuangRegister-transfer-levelfunctionalverificationtechniques200049.MKantrowitz.LMNoackI'mdonesimulating:Nowwhat?VerificationcoverageanalysisandcorrectnesscheckingoftheDECchip21164Alphamicroprocessor199650.KannaShimizu.DavidLDillderivingasimulationinputgeneratorandacoveragemetricfromaformalspecification200251.KannaShimizu.DavidLDill.AlanJHuMonitor-BasedFormalSpecificationofPCI200052.KannaShimizu.DavidLDill.Ching-TsunChouASpecificationMethodologybyaCollectionofCompactPropertiesasAppliedtotheIntelItaniumTMProcessor200153.KannaShimizuWriting,verifying,andexploitingformalspecificationsforhardwaredesigns200254.FeliceBalarin.Yos