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Driveforbettervision2020/5/30FabProcessIntroductionHimaxProprietary&Confidential2StepsofICManufactureMarketingSystemSpecificationLogic/circuitdesignWaferfabricationRulecheck/MaskfabricationBumpingAssemblyTestingUserHimaxProprietary&Confidential3DeviceStructure1.Well2.Anti-punch3.Vtadjustment4.Gate1.well5.LDD8.source/drain2.Anti-punch6.pocket3.Vtwafer7.spacer4.GoxFrontend5.LDD6.Pocket(halo)7.Spacer8.Source/drainHimaxProprietary&Confidential4DeviceStructureInterconnection1.Contact2.Via3.MetalBackend2.via1.contact3.metalInter-metalDielectrics4.Oxide4.OxideHimaxProprietary&Confidential5P-sub(Siliconwafer)SiN(Nitrid)Padoxide1.1.WaferStart1.2.PADOxidation(stressbuffer)1.3.SiNDeposition(hardmask)1.4.DiffusionLithography:1.4.1P.R.coating1.4.2StepperExposure1.4.3DevelopmentPhotoResistorcoatingDiffusionmaskStepperExposureDiffusionP.R.P-sub(Siliconwafer)SiN(Nitrid)PadoxideBriefProcessFlow-FirstLayer(Diffusion)MostofrawmaterialsareP-type.HimaxProprietary&Confidential6DiffusionP.R.P-sub(Siliconwafer)SiN(Nitrid)PadoxideSTISTI1.5.Trench(STI)PlasmaEtching1.5.1SiNEtching1.5.2SiliconEtching1.6.PhotoResistorremoveBriefProcessFlow-FirstLayer(Diffusion)cont’HimaxProprietary&Confidential7DiffusionP.R.P-sub(Siliconwafer)SiN(Nitrid)PadoxideSTISTISTI1.7.STIrefill(APCVDorHDP)1.7.1LinerOxideGrowth1.7.2APCVD(HDP)Oxidedeposition1.7.3STIFurnaceDensify1.8.STICMP1.9.SiNremoveBriefProcessFlow-FirstLayer(Diffusion)cont’STI:shallowtrenchisolationHimaxProprietary&Confidential8HDP(highdensityplasma)cangetbettergapfillingabilitydependingontheratioofdepositiontosputtering.BenefitofHDPHimaxProprietary&Confidential9在0.25um製程之前,LOCOS是被普遍使用的絕緣隔離製程,因為它非常簡單。BenefitofSTI.Offeringbetterlatch-upimmunitySmallerchannelwidthencroachmentthanLOCOSprocess.STIeliminatesBird'sBeakeffectfoundinLOCOS.PlanarsurfaceachievedSTIvs.LOCOSLOCOS:localoxidationofsiliconHimaxProprietary&Confidential10在STI-HDPOXIDEDeposition後,Trench密集區的OXIDE多填入Trench內,而空曠區的OXIDE多在SIN之上,如此在後續的CMP製程將會引致不同的Polishingrate。因此用一個ODReverseTone(簡單來看就是一個和ODPattern相反的光罩)將空曠區的OXIDE曝開再由OXIDEETCH將在SIN上的OXIDE吃掉,而使整片wafer的OXIDEdensity一致,在CMP後能得到較佳的Uniformity。AfterSTI-HDPOXIDEDepositionAfterODRPHOTO&ETCHDepositionODR(ReverseSTI)HimaxProprietary&Confidential11N-WELLMaskP.R.CoatingN-WELLP.R.StepperExposure2.1.SACoxide2.2.N-WELLFormation:2.2.1N-WELLPRcoating2.2.2N-WELLLithography2.2.3Development2.2.4N-WELLimplant2.2.5PRstripping2.3.P-WELLFormation:2.3.1P-WELLPRcoating2.3.2P-WELLLithography2.3.3Development2.3.4P-WELLimplant2.3.5PRstrippingP-sub(Silicon)Sac.oxideSTIPWELLN-WELLP.R.CoatingP-WELLMaskStepperExposureN-WELLImplant1.N-WELL2.PMOSanti-punch3.PMOS-VTP-WELLImplant1.P-WELL2.NMOSanti-punch3.NMOS-VTBriefProcessFlow-WellformationHimaxProprietary&Confidential12SACoxideThepurposeofSACoxideis避免光阻和Si表面直接接觸,造成污染避免在離子植入時,產生穿隧效應,使dopantprofile得到較好的控制SurfacecornerroundingforSTIprocessHimaxProprietary&Confidential13PRcoatingP-sub(Silicon)NWELLPWELLGateOxideTGMaskStepperExposureGateOxide2UPOLYgrowth3.GateOxideFormation:3.1ThickGateOxideGrowth3.2PRcoating3.3TGLithography3.4Development3.5RCA-AWetetching3.6PRstripping3.7ThinGateOxideGrowth4.PolyGrowth4.1POLYgrowth4.2N+POLYPRcoating4.3N+POLYLithography4.4Development4.5N+POLYimplantandPRStripPRCoatingN+POLYMaskN+POLYPRN+POLYimplantStepperExposureBriefProcessFlow-GateOxideandPOLYHimaxProprietary&Confidential14GOXProcessKeyfactorsforGOXprocess降低成長速率以利厚度均勻度控制使用Cl-離子growth方式,減少金屬污染低溫出爐,以降低Si/SiO2的oxidefixedchargedensity上下介面雜質控制HimaxProprietary&Confidential15P-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPRP-LDDP-PKTStepperExposureN-LDDImplantP-LDDimplant5.PolyGateFormation:5.1POLYLithography5.2Development5.3POLYGateetching5.4PRstripping6.LDD(LightDopeDrain)implant6.1N-LDDLithography(ellipsis)6.2NLDD/N-PKTimplant6.3P-LDDLithography(ellipsis)6.4PLDD/P-PKTimplantBriefProcessFlow-GateEngineeringHimaxProprietary&Confidential16OPC(OpticalProximityCorrection)OPC全名為opticalproximitycorrection主要是為了解決photoproximityeffect.Photoproximityeffect是光互相干擾自然現象.HimaxProprietary&Confidential17GeneralconceptsGenerationsofilluminationG-line:436nm0.5umI-line:365nm0.25um~0.35umDUV(KrF):248nm0.13um~0.25umDUV(ArF):193nm0.07um~0.15umEUV(F2):157nm0.1umResolutionvs.DOF(depthoffocus)一般來說,較短波長與較大數值孔鏡NA,可得到較佳的resolution,但使DOF變小。在固定波長時,提高resolution將降低DOF。SmallDOFneedmoreplanarsurfaceCMP(STIandbackend)HimaxProprietary&Confidential18P-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPRP-LDDP-PKTN+PRN+N+P+PRP+P+ImplantN+implant7.SiNSPACERFormation:7.1LPTEOSDEP.7.2SiNDEP.7.3SiNSPACEREB8.S/Dimplant8.1N+SDLithography8.2N+SDimplant8.3P+SDLithography8.4P+SDimplant8.5SDAnnealRTPBriefProcessFlow-DrainEngineeringHimaxProprietary&Confidential19P-subNWELLSTIPWELLPolyPRcoatingPolyMaskNLDDN-LDDN-PKTN-LDDN-PKTP-LDDPRP-LDDP-PKTN+PRN+N+P+PRP+SABPSGUSG9.SalicideFormation:9.1PETEOSCapOxidedep.9.2SAB(Salicide-Block)Lithography(ellipsis)9.3Ti/Cosputtering9.4SalicidationRTPC49annealing9.5SalicidationRTPC54annealing10.ILDPassivation10.1SiNdeposition(Moistureandsodiumblock
本文标题:Fab-process-introduction
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