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XMP277(v1.4.2)April10,2014CompanyCustomerProjectCustomerContactReviewDateXilinxReviewersPURPOSEDISCLAIMERCOPYRIGHTCustomer_NameProject_NameCustomerContactmm-dd-yyyyAE_Name1,AE_Name2,…ConductingschematicreviewstoensureanFPGAdesignisoptimallyconfiguredforfirst-timesuccessisadifficulttask.Partofthechallengestemsfromthemanydifferentsourcesofinformationthatthedesignerneedstoreference,includingthedevicedatasheet,familyuserguide,answerrecords,errata,etc.,aswellasthesoftwaredesigntools.ThisrecommendationsdocumentprovidesatemplateforperformingandrecordingtheresultsofaNOTICEOFDISCLAIMER:Theinformationdisclosedtoyouhereunder(the“Materials”)isprovidedsolelyfortheselectionanduseofXilinxproducts.Tothemaximumextentpermittedbyapplicablelaw:(1)MaterialsaremadeavailableASISandwithallfaults,XilinxherebyDISCLAIMSALLWARRANTIESANDCONDITIONS,EXPRESS,IMPLIED,ORSTATUTORY,INCLUDINGBUTNOTLIMITEDTOWARRANTIESOFMERCHANTABILITY,NON-INFRINGEMENT,ORFITNESSFORANYPARTICULARPURPOSE;and(2)Xilinxshallnotbeliable(whetherincontractortort,includingnegligence,orunderanyothertheoryofliability)foranylossordamageofanykindornaturerelatedto,arisingunder,orinconnectionwith,theMaterials(includingyouruseoftheMaterials),includingforanydirect,indirect,special,incidental,orconsequentiallossordamage(includinglossofdata,profits,goodwill,oranytypeoflossordamagesufferedasaresultofanyactionbroughtbyathirdparty)evenifsuchdamageorlosswasreasonablyforeseeableorXilinxhadbeenadvisedofthepossibilityofthesame.XilinxassumesnoobligationtocorrectanyerrorscontainedintheMaterialsortonotifyyouofupdatestotheMaterialsortoproductspecifications.Youmaynotreproduce,modify,distribute,orpubliclydisplaytheMaterialswithoutpriorwrittenconsent.CertainproductsaresubjecttothetermsandconditionsofXilinx’slimitedwarranty,pleaserefertoXilinx’sTermsofSalewhichcanbeviewedatat©Copyright2012–2014Xilinx,Inc.Xilinx,theXilinxlogo,Artix,ISE,Kintex,Spartan,Virtex,Vivado,Zynq,andotherdesignatedbrandsincludedhereinaretrademarksofXilinxintheUnitedStatesandothercountries.ThePowerPCnameandlogoareregisteredtrademarksofIBMCorp.,andusedunderlicense.AllothertrademarksaretheSCHEMATICREVIEWRECOMMENDATIONS!1.2.3.4.5.6.7.GeneralInstructionstotheReviewerMacrosmustbeenabledforfullfunctionality.Thisspreadsheetisintendedtoprovidealistofwhathasbeenchecked(andwhathasnotbeenchecked)duringacustomerschematicreview.Itisnotintendedtobeacomprehensivechecklist.TheProjectInfopagegivesanoverviewoftheschematicthatisbeingreviewedandtheperson(s)performingthereview.ItalsocontainsthePurposeandDisclaimerparagraphs.TheChecklistpagescontainsomeofthemorecommonitemsthatshouldbechecked.Insomecases,theseitemsmightnotapplytoaspecificschematicreviewandcanbedeleted.Inothercases,theremightbeadditionalitemsthatneedtobechecked.Inthatcase,theusercanaddalinetotheendoftheworksheet.Inseveralcells,thereareXilinxrecommendationscontainingquestionmarks(e.g.,?of??mFcap).Thequestionmarksareintendedtoremindtheusertoreplacethe'?'withtheappropriatevalue.Inthisexample,thenumberofcapsandthevalueofthosecapsneedtoberecorded.TheChecklistpagesareintendedtocollectinformationforasingleFPGAanditssupportingdevice(suchasaconfigurationPROM).AtthetopoftheChecklistpage,thedevicepartnumberandreferencedesignatorneedtoberecorded.Iftherearemultipledevices,aworkbookshouldbecreatedforeachdevice.EachcellintheStatuscolumnhasapull-downmenuwiththecolor-codedselectionsOK,CHECK,andPROBLEM.TheStatuscolumnallowsthecustomertoquicklyseetheresultsoftheschematicreview.·OK:Theitemreceivesreviewerapproval.·CHECK:ThereviewerdoesnothavesufficientinformationtodetermineiftheitemisOKorposesaPROBLEM.Thedesignermustresearchtheitemandprovideadditionalinformation.·PROBLEM:Thereisanissuewiththeitem.PROBLEMflagstheitemforthedesigner,whoneedstoresearchtheissueandfindasolution.·NotChecked:Theitemhasnotbeencheckedandmightrequireadditionalattention.·N/A:Theitemisnotapplicabletothisdeviceordesign.TheActualImplementationcolumncanbeusedtoprovideadditionalclarification.ThisinformationisespeciallyimportantiftheitemistaggedwithCHECKorPROBLEM.GeneralInstructionstotheReviewerFamilyArtix-7Device7A35TPackageCSG325ConfigurationModeMasterSPIX1(andJTAG)(Mode(001)ConfigurationFrequency(MHz)2.000ReferenceDesignatorPleaseenteraReferenceDesignator(optional)ItemXilinxRecommendationActualImplementationStatusVCCINT1.0V,0of680uF,1of330uF,0of100uF,0of47uF,4of4.7uF,6of0.47uFVCCBRAM1.0V,1of100uF,0of47uF,0of4.7uF,2of0.47uFVCCAUX1.8V,1of47uF,2of4.7uF,4of0.47uFVCCAUX_IO_G#Doesnotapplytoselectedfamilyordevice.VCCOBank01.5V-3.3V,1of47uFVCCOBank141.2V-3.3V,1of47uF,2of4.7uF,4of0.47uFVCCOBank151.2V-3.3V,1of47uF,2of4.7uF,4of0.47uFHRbanks14,15,341.2V-3.3,1of47uFper4banksand2of4.7uF,4of0.47uFperbankHPbanksN/A(NoVCCAUX_IOgroups)TherearenoHPbanksinthisdevice.VREFConnecttotheappropriatevolta
本文标题:7-Series-Schematic-Review-Recommendations-xart-040
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