SOC的可测性设计策略

.2008.16(8)ComputerMeasurement&Control1095:20080128;:20080305:(1980),,,,,(1968),,,:16714598(2008)08109504:TN402;TN407:ASOC徐智伟,张盛兵(,710065):SOC(SystemOnChip);15,,;ATPG(AutomaticTestPatternGeneration),;,,,9869%,;SOC,:;;;DFTStrategyofSOCXuZhiwei,ZhangShengbing(SoftwareCollege,NorthwesternPolytechnicalUniversity,Xian710065)Abstract:ThroughthestudiesofarealcaseinvolvingDFT(DesignForTest)strategyofSOC(SystemOnChip),targetingonspecialmodules,appropriateDFTstrategiesareadoptedsuchasmemorytestingusingMBIST(MemoryBuilt-InSelfTest),specialfunctionverificationofthePLL(PhaseLockedLoop)andsoon,andtestingtherestmoduleswithATPG(AutomaticTestPatternGeneration).Inaddition,variousmodulesaredesignedtooptimizethetestingcircuitry.Ithasbeenproventhatthroughthetestingstrategieslistedabove,powerconsumptionandareaweremetthespecification,andthetestcoverageisoptimizedby98.69%,whichmakesthetestablecircuitrybothcontrollableandobservable.ThereforeinSOCdesigntheDFTstrategiesandresourcesshouldbeassignedefficientlyinordertogettheexpectedtestingresults.Keywords:SOC;DFT;MBIST;ATPG0,(DesignForTest,DFT)DFT,!∀;,;[1]SOCDFT:(1)(2),[2],DFT(3)SOC,,(4),,SOC,DFTSOC,8051,,200,DFT:(1)96,8051,(MemoryBuilt-inSelfTest,MBIST),,,TCU(TestControlUnit),MBIST(2),(PLL),,(3)/PAD,,,PAD,/(4),ATPG1DFT11:,;,,:(MBISTscan),,12SOC,[3],96,10961652%,,,[4],,,,121MBIST(Stuck-at-fault),(Transitionfault),(AddressDecoderFaults)(Coupling)[5];,,MBIST,MBIST,MarchC+CheckerboardMarchC+,,;:(:0n-1;:n-10)(0);(0,1);(1,0);(0);(0,1);(1,0);(0)Checkerboard,,,,0,1,122MBISTwrapperMBISTwrapper,1,MarchC+Checkerboard!∀,,!∀1MBISTwrapper!∀,,MBIST(),,,!∀(FuseStore);,()!∀(RegisterLoad),MBIST,,,!∀,!∀!∀(),mbist_fail;,mbist_nogo,,;mbist_done123TCUSOC96,,MBIST,MBISTwrapperTCUTCU:,RegisterLoadFuseStoreMBIST,,FuseStore,FuseStore,FuseStore,(bypass),FuseStoreRegisterLoad2TCU(reset),ready1,RegisterLoad,!∀;start_load1,()!∀;load_finished1,,;Finish_load;readystart_load0,;(Isolate_Fuse);Deactive_fuse_pwr,2RegisterLoadMBISTwrapper3,Mentormodelsim6123(PLL)SOC,PLL,DAC(),ADCATPG,4,,,,8,:SOC10973MBISTwrapper;;;,4,,,,0,,,,,[6]5PLLPLL,:fclkref_i,NM,fclkout_o;Tlockfclkout_o=N+1M+1#fclkref_iTlock∃600sPLL520MHz,M=3N=11,60MHzDACADC,,24/PAD,/PAD,,,,,PAD,(PADMultiplexer),PAD,PAD,/PAD,:PAD(),/PAD,PAD,PAD1,PAD2;PAD2PAD1,PAD1PAD:PAD/,PAD,PAD,PADPAD//PAD,PAD,25ATPG,(),,ATPG,PLLATPG(blackbox),,,,,,,,,ATPG,,,,,,SynopsysTetraMAXMentorFastScanEDA,ATPG;(DesignRuleChecking-DRC),,,,/,;;ATE(AutomaticTestEquipment-ATE)109816,/,/,ATE,3,26mm2,06%;280mW,276mW;MBIST(MarchC+Checkerboard)99%;,/PAD100%;ATPG9706%(FastScan);98.69%SOC,DFT,SOCDFT:(1)DFT(2)DFTATPG(3),,DFT,DFT(4),,RTL,(5)ATPG,(6)ATE,DFT,,,:[1]BushnellML.Essentialsofelectronictestingfordigital,memory,andmixed-signalVLSIcircuits[M].KluwerAcademicPublishers,2000:3-36.[2],.[J].,2005,31(20):1.[3]CrouchAL.[M].:,2006.[4].[J].,2006,14(5):1.[5]AbramoviciM,BreuerMA,FriedmanAD.[M].:,2006.[6],.[J].,2005,22(8):2.(1094)(2):,(FFT),2n,[5],fsfmax,fs,fs=(3~4)fmax,,,,:ON,,4,,,,,,50kHz,,,,4LabVIEWLabVIEW,,,,,:[1],.[M].:,2006[2]NationalInstrumentCorporation.LabVIEWTMMeasurementsManual[Z].NationalInstrumentCorporation,2000[3],,.LabVIEW[J].,2006,(1):137-139.[4],,.LabVIEW[J].,2005,24(2):73-74[5],.LabVIEW71[M].:,2005%()&2009%&,2009%&%&2009,12009%&(:60)%&,踴跃订阅%&,12,72%&16(210mm#285mm),26,:82-424:72(100071)/:010-6381019563851806