基于verilog交通灯设计

moduletraffic(clk,rst_n,red,yellow,green);inputclk;inputrst_n;outputyellow,redgreen;regred,green,yellow;reg[7:0]counter;always@(posedgeclkornegedgerst_n);beginif(!rst_n)begincounter=8'd0;endelsebeginif(counter=8'd8)begincounter=counter+1'b1;endelsebegincounter=8'd0;endendalways@(posedgeclkornegedgerst_n)beginif(!rst_n)begingreen=1'b1;yellow=1'b1;red=1'b1;endelseif(counter=8'd3)begingreen=1'b1;yellow=1'b1;red=1'b1;endelseif(counter==8'd4)begingreen=1'b1;yellow=1'b0;red=1'b1;endelseif(counter=8'd5)beginred=1'b0;yellow=1'b1;red=1'b1;endelseif(counter==8'd9)beginred=1'b1;yellow=1'b0;green=1'b1;endendendendmodule