汤铭-FE1.1s-Data-Sheet-(Rev.-1.01)

USB2.04-PortHubDataSheetRev.1.01FE1.1SUSB2.0HIGHSPEED4-PORTHUBCONTROLLER_______________________DataSheet_______________________INTRODUCTIONTheFE1.1sisahighlyintegrated,highquality,highperformance,lowpowerconsumption,yetlowcostsolutionforUSB2.0HighSpeed4-PortHub.ItadoptsSingleTransactionTranslator(STT)architecturetobemorecosteffective.Six,insteadoftwo,non-periodictransactionbuffersareusedtominimizepotentialtrafficjamming.Thewholedesignisbasedonstate-machine-controltoreducetheresponsedelaytime;nomicrocontrollerisusedinthischip.Toguaranteehighquality,thewholechipiscoveredbyTestScanChain–evenonthehighspeed(480MHz)modules,sothatallthelogiccomponentscouldbefullytestedbeforeshipping.SpecialBuild-In-Self-Testmodeisdesignedtoexerciseallhigh,full,andlowspeedAnalogFrontEnd(AFE)componentsonthepackagingandtestingstagesaswell.Lowpowerconsumptionisachievedbyusing0.18μmtechnologyandcomprehensivepower/clockcontrolmechanism.Mostpartofthechipwillnotbeclockedunlessneeded.FEATURESFullycompliantwithUniversalSerialBusSpecificationRevision2.0(USB2.0);□UpstreamfacingportsupportsHigh-Speed(480MHz)andFull-Speed(12MHz)modes;□4downstreamfacingportssupportHigh-Speed(480MHz),Full-Speed(12MHz),andLow-Speed(1.5MHz)modes;IntegratedUSB2.0Transceivers;Integratedupstream1.5KΩpull-up,downstream15KΩpull-down,andserialresisters;Integrated5Vto3.3Vand1.8Vregulator.IntegratedPower-On-Resetcircuit;Integrated12MHzOscillatorwithfeedbackresister,andcrystalloadcapacitance;Integrated12MHz-to-480MHzPhaseLockLoop(PLL);SingleTransactionTranslator(STT)–□OneTTforalldownstreamports;□TheTTcouldhandle64periodicStart-Splittransactions,32periodicComplete-Splittransactions,and6none-periodictransactions;Automaticself-powerstatusmonitoring;□Automaticre-enumerationwhenSelf-Feb.9,2009SubjecttoChangeWithoutNotice1USB2.04-PortHubDataSheetRev.1.01PoweredswitchingtoBus-Powered;GangedPowerControlandGlobalOver-CurrentDetectionsupport;EEPROMconfiguredoptions–□VendorID,ProductID,&DeviceReleaseNumber;and□NumberofDownstreamPorts;ComprehensivePortIndicatorssupport:□DownstreamPortEnabledindicatorLED(x4,Green);□HubActive/SuspendindicatorLED.Feb.9,2009SubjecttoChangeWithoutNotice2USB2.04-PortHubDataSheetRev.1.01BLOCKDIAGRAMFeb.9,2009SubjecttoChangeWithoutNotice3Fig.1:BlockDiagramDown-streamPHY#1Down-streamPHY#2Down-streamPHY#3Down-streamPHY#4UpstreamPHYRoutingSwitchDataTransmitDataRecovery&ElasticBufferPLL(x40)3.3V&1.8VRegulatorPORUSBMulti-portTransceiverMacroCellSIEDownstreamPortControllersUpstreamPortControllerTransactionTranslatorFull/Low-SpeedHandlerTransactionTranslatorHigh-SpeedHandlerHubControllerLEDControllerUnifiedTransactionTranslatorBuffer(2KB)USB2.0HubControllerOSC12MHzCrystalToDownstreamDevicesToUpstreamHost/HubPortIndicatorsEEPROM,HubActivityLEDOverCurrentDetectionPowerSwitchControlUSB2.04-PortHubDataSheetRev.1.01PACKAGE28-pinSSOP(BodySize:10x4mm,Pitch:0.64mm)PINASSIGNMENTFeb.9,2009SubjecttoChangeWithoutNotice4Fig.2:SSOP-28PinAssignmentFE1.1s1131215VSSXOUTXINDMUDPUXRSTJVBUSMBUSJDM4DP4DM3DP3DM2DP2DM1DP1VD18_OVD33REXT14111098765423VDD5VD33_OTESTJDRVLED1LED2PWRJOVCJVD1816171819202122232425262728USB2.04-PortHubDataSheetRev.1.01PINDESCRIPTIONTABLEPinNamePinNo.TypeFunctionNoteVSS1PGround.XOUT2OSC12MHzCrystalOscillatoroutputXIN3OSC12MHzCrystalOscillatorinput.DM44UTTheD-pinofthe4thDownstreamFacingPort.DP45UTTheD+pinofthe4thDownstreamFacingPort.DM36UTTheD-pinofthe3rdDownstreamFacingPort.DP37UTTheD+pinofthe3rdDownstreamFacingPort.DM28UTTheD-pinofthe2ndDownstreamFacingPort.DP29UTTheD+pinofthe2ndDownstreamFacingPort.DM110UTTheD-pinofthe1stDownstreamFacingPort.DP111UTTheD+pinofthe1stDownstreamFacingPort.VD18_O12P1.8Vpoweroutputfrom3.3V→1.8Vintegratedregulator–a10μFdecouplingcapacitorisrequired.VD3313P3.3Vpowerinputfor3.3V→1.8Vintegratedregulator.REXT14A2.7KΩ(±1%)resistershouldbeconnectedtoVSStoprovideinternalbiasreference.DMU25UTTheD-pinoftheUpstreamFacingPort.DPU16UTTheD+pinoftheUpstreamFacingPort.XRSTJ17IExternalReset,activelow,isanoptionalsourceofchipresetsignal,besidethebuild-inPower-On-Reset.Theminimumlowpulsewidthis10μs.VBUSM18ITheVBUSMonitorofupstreamfacingport.BUSJ19IBuspowerindicator:0–BusPowered;1–SelfPowered.VDD520P5Vpowerinputforintegrated5V→3.3Vregulator.VD33_O21P3.3Vpoweroutputfrom5V→3.3Vintegratedregulator–a10μFdecouplingcapacitorisrequired.TEST―—ITestModeEnable–shouldbetiedtogroundfornormaloperation.DRV22I/OLEDDriveControl1LED1/EESCL23I/OPort1andPort3EnabledIndicator(LED)Control,andexternalSerialEEPROMClock.1LED224I/OPort2andPort4EnabledIndicator(LED)Control1Feb.9,2009SubjecttoChangeWithoutNotice5USB2.04-PortHubDataSheetRev.1.01PWRJ25ODownstreamDevicePowerEnable,activelow,forGangedPowerSwitching.OVCJ26IOverCurrentIndicator,activelow,forGlobalOver-CurrentProtection.TESTJ/EESDA27I/OTestModeEnable,activelowwithinternalpull-up,andexternalSerialEEPROMData/Address.1VD1828P1.8Vpowerinput.TypeAbbreviation–I:Input;O:Output;I/O:Input/Output;P:Power/Ground;UT:USBTransceiver.Note1–LEDStatusIndicatorsandExternalSerialEEPROMInterfaceTheFE1.1ssupportsupto5LEDforstatusin