复旦半导体工艺教材Chapter-2

Chapter2BasicVLSI/ULSIFabricationProcessTechnologyOutlineI.EvolutionofICProcessTechnologyII.MainLSI/VLSIprocessesdevelopedinhistoryIII.CMOScorebasedULSItechnology---basisofpresentMicroelectronicsIV.MainelementaldevicesandprocessflowofICfabricationV.MajorchipfabricationmaterialandtechnologyVI.Ultracleantechnologies-ofvitalimportanceforVII.VLSI/ULSImanufacturingI.EvolutionofICProcessTechnologyICcircuitryevolutiondeterminedbyprocessprogressBipolarprocess:RTL,DTL,TTL,STTL,LSTTL,ECL,I2L…..MOSProcess:PMOS,NMOS,CMOSJFET,MESFETProcesstechnology-MostactivefactorinICprogressPNjunctionformedbygrowthdopingormetal/Ge(Si)alloydopingin1950s*GrowthdopingNPNTransistor*AlloydopingPNPTrasistorPNjunctionformedbyblanketdiffusiondopingin1950sTransistorformedbyplanarprocessbasedondiffusion,oxidationandlithographinlate1950s*Doublediffusedmesatransistorprocess*TransistorbyplanarprocessTransistorandothercircuitelementsformedbyplanartechnologyOn-chipresistor:bydiffusion;poly-SibydepositionOn-chipcapacitor:metal/I/Si;M/I/M;Poly-Si/I/Poly-Si(I-SiO2orotherdielectricfilm)On-chipinductor:spiralmetallinewithgroundshieldII.MainLSI/VLSIprocessesdevelopedinhistoryMainLSI/VLSI/ULSIrequirementsHighintegrationdensityHighspeedHighreliabilityLowpowerPMOSEarlyLSI/VLSIproducts:calculators,electronicgame,...LowspeedNMOSHigherspeedthanPMOSMainVLSIprocessin80’sforDRAM,microprocessorsStandardbipolar(LSTTL,ECL…)HighdrivingcapabilityAppliedforhigh-speeddevices:Earlyhigh-speedcomputer,communicationsystem,…LowerintegrationdensityandhigherpowerconsumptionI2LbipolarLowerpower&higherintegrationthanstandardbipolarLowerspeedCMOSLowestpowerconsumptionthanallothersNoiseresistanceandhigherreliabilityMainstreamofVLSI/ULSIprocesssincelate80’sBiCMOSCombinationofhighspeedandlowpowerHighprocesscomplexityGaAsMESFETICHigh-speeddevicesforcommunication,etc.PossibilityofintegrationwithphotonicdevicesIII.CMOScorebasedULSItechnology-basisofpresentmicroelectronicsLowpowerconsumptionEssentialrequirementforULSI/SoCchipCMOSbasedSiprocessDominantULSItechnologyCombinationofCMOScoreprocessandspecialprocessmodules→VariousULSIchiptechnologiesDRAM,SRAM,FlashEPROM,Logic,BiCMOS,CommunicationICs,…→SystemonChip(SoC)technologyPassivationInterconnectionMOSFETTransistorWellFormationIsolationCMOSCORETechnologyEpitaxyBaseFormationBICMOSPoly-SibasedSRAMCellSRAMFlashcell&HighVoltageMOSFETFLASHEPROMCommunicationICRFProcessModuleMultilevelMetalMicroprocessor&LogicCapacitorDRAMCellDRAMIV.MainelementaldevicesandprocessflowofICfabricationAllICarebasedonfewmaindeviceeffectspnjunction:transistor,diode,JFETFieldeffect:PMOS,NMOSSchottkybarriereffect:SBD,MESFETTheirfundamentalphysicsInterfaceeffectsSchematiccrosssectionandprocesstechnologyfor0.18mCMOSofBellLabMainSichipfabricationprocessflowdiagramEtchingWaferfabricationprocessmoduleProcessmodule—agroupofprocessstepstoformapartstructureofICTheentireICwafermanufacturingprocessconsistsof14-20processmodulesAtypicalprocessmoduleconsistsof10-20processstepsProcessintegration—ofvitalimportanceforsuccessofacertainfabricationtechnologyProcessModulesV.Majorchipfabricationmaterialandtechnology1.SimaterialLarge-diameteranddefect-freeSicrystalgrowthΦ100Φ125Φ150Φ200Φ300?Φ450(mm)ThinSilayerepitaxialgrowthn-Silayer/p-Sisubstrate,n/n+,p/p+SiGe/Sihetero-epitaxy;strainedSiGeorstrainedSiSOI(SionInsulator)materialBySIMOX(O+-implant),bonding/smart-cutGetteringtechnology2.FinepatternmicrostructureformationtechnologyReticle/maskpatterngenerationbye-beamOpticallithographyUVLampg-line=436nm0.5μm;i-line=365nm0.35μmDUVExcimerLaser*KrF248nm250,180nm…*ArF193nm130,90,65,45nm…*F2157nm(?)*Ar2126nm(?)EUVLaserplasmasource:13nmPhaseshiftmaskandotherwave-fronttechnologyPatternfeatureλStep-and-ScanexposuresystemE-beamlithography(formassproductiontoolstillinR&D)DirectwritingonwaferandothermethodsMix-and-MatchlithographyHighresolutionresistmaterialandprocessHighresolutionetchingtechnology(Ex.HDP-RIE)Self-alignedmicrostructureformationByselectiveetching,reaction,epitaxyandothermethods3.SelectiveDopingTechnologySitransistor—productofdopingengineering*Devicetypeandperformance--determinedbyimpuritydopingprofile(element,concentration,distribution)Lowenergyionimplantandshallowjunctionformation—ofvitalimportancefornano-meterCMOSfabricationHighenergyionimplantforn/pwellsRapidthermalprocess(RTP)anddopantatomdiffusioncontrol4.DielectricThinFilmMaterialandProcessUltrathingateoxidegrowth*OfkeyimportantforadvancedCMOS:30nm0.8nmByusingnitridedoxideHigh-Kdielectricsasnewgatedielectric*Intensiveinvestigationonaseriesofmaterialswithk~10-100HfO2,Al2O3,ZrO2,ZrSixOy,TaOxNy,HfSixOy,TiO2,La2O3,SrTiO3…Low-Kdielectricsforinter-metalisolationInorganic/OrganicK3.9*High-densityplasma(HDP)CVDdeposition*SOG(Spin-On-Glass),SOP(Spin-On-Polymer)5.DeviceIsolationTechnology:frompnjunctionisolationtonewdielectricisolationModifiedLOCOS(LocalOxidationofSi)Poly-SibufferedLOCOS(PBL),,Shallowtrenchisolation(STI)LOCOS-CMOSSTI-CMOS6.ContactandInter