基于STM32的照相机系统的实现

11...........................................................................................................................................................11.1...............................................................................................................................................21.2...........................................................................................................................................................42...........................................................................................................................................42.1...................................................................................................................................................42.2...........................................................................................................................................................52.3.................................................................................................................................................122.4.....................................................................................................................................................162.5.................................................................................................................................................213..........................................................................................................................................293.1.................................................................................................................................................293.2.....................................................................................................................................293.3.........................................................................................................................................324...................................................................................................................................34.....................................................................................................................................................................36.............................................................................................................................................................3712[1]CCD1.1CCD1.11991,[2]CCD102,CMOSCCD,2310[2],,8GB[3]1.1.11973TexasInstrumentsIncorporated19731981MavicaCCDMavica3NTSC1.2Mavica1.1.21988DS-1P2MBRAM1995QV-101.1.31996C-800LCCD80130DS300140C-1400L199920020003002004800167041.3OV-101.41.1.4STM32STM321.2STM32STM3222.15LEDSTM32OV7725ILI9341128MBSD2.1STM32LCDILI9341VO7725KeySDCardLED2.1STM322.22.2.1STM32F103ZET61ARM32Crotex-M3CPU72MHZ2256KB/512KBFLASH64KBSRAM4SRAMPSRAMNORNANDLCD8080/680032.0~3.6VI/OPOR/PDRPVD4~16MHZ8MHZRC32kHZRTC4VBATRTC53121s(21)6DMA12DMAADCSPII2CUSART7112I/O51/80/112I/OI/O1668SWDJTAGCortex-M3ETM9114164//PWM/216PWM2216DAC10132I2CSMBus/PSMBus5USARTISO7816LIN,IrDA3SPI18Mbit/sCANUSB2.0SDIO11CRC9612ECOPACK2.2.2STM32GPIO/GPIOGPIOSTM32STM32HSIHSELSILSEPLL[4]1HSIRC8MHz2HSE4MHz~16MHz3LSIRC40kHz4LSE32.768kHz5PLL2~1672MHz7HSIRCHSEOscLSEOsc1/21/2PLLAHBAPB1TIM2,3,4Multipliterx1orx2CSS1/128LSIRC1/2TIM1Multipliterx1orx2ADCUSB+1or+1.5OSC_OUTOSC_INOSC32_OUTOSC32_INSYSCLKHSIHSEPLLCLKPLLCLK8MHZRTCUSBADCTIM1APB1=36MHZAPB2=72MHZAHB=36MHZAPB2MCO2.2STM322.2.3GPIOSTM32GPIO232bit(GPIOx_IDRGPIOx_ODR)132bit/(GPIOx_BSRR)232bit(GPIOx_CRLGPIOx_CRH)116bit(GPIOx_BRR)132bit(GPIOx_LCKR)GPIOGPIOxTypedefstruct{__IOuint32_tCRL;__IOuint32_tCRH;__IOuint32_tIDR;8__IOuint32_tODR;__IOuint32_tBSRR;__IOuint32_tBRR;__IOuint32_tLCKR;}GPIO_TypeDef;GPIOGPIO_InitStructTypedefstruct{uint16_tGPIO_Pin;GPIOSpeed_TypeDefGPIO_Speed;GPIOMode_TypeDefGPIO_Mode;}GPIO_InitTypeDef;I/0432bit32///1GPIO2.3GPIO9GPIOGPIO_Mode8GPIO_Mode_AINADCGPIO_Mode_IN_FLOATINGRXGPIO_Mode_IPDGPIO_Mode_IPUGPIO_Mode_Out_OD0IO1IO1,IOGPIO_Mode_Out_PP01VCCGPIO_Mode_AF_ODTX1,SPIGPIO_Mode_AF_PPI2CSCL,SDAGPIOGPIO_SpeedGPIOI/OSTM322MHz10MHz50MHz2GPIOI/OGPIOI/OGPIO()()()102.2.41CPUkernalChannel1Channel2Channel312345212.42STM32Cortex-M3core_m3.h8IP3NVICcore_m3.hSCBcore_m3.hTIM2TIM2_DIER11NVICNVICtypedefstruct{vu32ISER[2];u32RESERVED0[30];vu32ICER[2];u32RSERVED1[30];vu32ISPR[2];u32RESERVED2[30];vu32ICPR[2];u32RESERVED3[30];vu32IABR[2];u32RESERVED4[62];vu32IPR[11];}NVIC_TypeDef;STM32typedefstruct{uint8_tNVIC_IRQChanneluint8_tNVIC_IRQChannelPreemptionPriority;uint8_tNVIC_IRQChannelSubPriority;FunctionalStateNVIC_IRQChannelCmd;}NVIC_InitTypeDef;4STM32/Cortex-M3CPU/STM32stm32f10x_nvic.hstm32f10x_nvic.cPRIMASK12FAULTMASKCPU/**/voidNVIC_SETPRIMASK(void);voidNVIC_SETFAULTMASK(void);/**/voidNVIC_RESETPRIMASK(void);voidNVIC_RESETFAULTMASK(void);2.32.3.1ILI9341ILI9341TFT26240RGBX320720320172800GRAM[5]ILI93418/9/16/18MCU6/16/18RGB3/4SPIGRAM[6]ILI93411.65~3.3VI/OLCDILI93418LCD2.3.2FSMCFSMC(FlexibleStaticMemoryController)STM32256KBFLASHxCxDxE[7]FSMC//STM32[8]1FSMC132.5FSMCFSMCNORFLASH4NORFLA