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2005820047220052005-081.………………………………………………………………12.…………………………………………………………53.…………………………………………………94.……………………………………………………………175.…………………………………………………206.C………………………………………………………257.………………………………………………………308.………………………………………………………359.…………………………………………………3810.…………………………………………………………4111.……………………………………………………………4412.…………………………………………………………4813.………………………………………5314.………………………………………………………6215.EDA……………………………………………………6516.…………………………………………………………6917.DSP……………………………………………………7318.MATLAB……………………………………………………………7519.…………………………………………………7820.……………………………………………………………8121.………………………………………………8522.…………………………………………………………9023.……………………………………………………………9324.…………………………………………………………9625.………………………………………………………………9926.………………………………………………………10227.………………………………………………………10628.……………………………………………………10829.VLSI……………………………………………………11230.ASIC……………………………………………………11531.……………………………………………………11832.…………………………………………………………122-1-8551.1.11.21.31.4KCLKVL2.2.12.22.33.3.13.2KCL3.34.4.1-2-4.24.34.44.55.5.15.25.36.6.16.27.7.17.2RCRL7.37.47.5RLCRCRLRLC8.8.18.28.38.4-3-8.5RLC9.9.19.29.39.410.10.110.210.311.11.111.211.311.412.12.112.212.3-4-13.13.113.2Z.Y.H.A13.313.413.5ZYH1.62.83.104.45.106.67.108.169.510.411.212.213.285199919931.2.-5-6841.1.11.2PN1.31.41.5PN2.2.12.22.32.42.52.63.3.13.2MOS3.33.43.53.6-6-4.4.14.24.34.45.5.15.25.35.45.56.6.16.27.7.17.2RC7.3LC7.48.8.18.28.3-7-9.9.19.21.82.163.84.85.86.67.68.49.46811999219863199241998-8-1.2.-9-6841.1.11.21.31.41.51.62.2.12.22.32.4BCD2.52.62.7BCD3.3.13.23.3CMOS3.4CMOS3.5CMOS-10-3.63.7TTL3.8CMOS/TTLCMOSTTLCMOSTTL4.4.14.24.34.45.5.15.25.3PLD5.45.55.65.75.85.95.105.116.6.16.26.36.46.56.6-11-7.7.17.27.3PLD7.47.57.68.CPLDFPGA8.18.28.3RAM8.4RAM8.5CPLD8.6FPGAROMRAMCPLDFPGA9.9.19.29.39.45555551.22.23.104.105.106.127.108.CPLDFPGA49.6-12-10.268DigitalDesignPrinciples&Practices.JohnF.Wakerly,HigherEducationPress,PearsonEducation.3rded.2001.51.DigitalElectronicsASimplifiedApproach.RobertD.ThompsonPublishingHouseofElectronicsIndustry,PearsonEducation2.3.://www.xilinx.com./programs/univ1.2.-13-DigitalElectronicsTeachingOutlineCourseSortSpecialtyFoundationApplicationElectronicsandInformationEngineering,CommunicationEngineeringTeachingHours68Credits4I.IntroductionThecourseisforundergraduatestudentsofElectronicsandInformationEngineering,CommunicationEngineering.Itisanimportantspecialtyfoundation.Thestudentsshouldmasterbasicprinciples,analysisanddesignmethods,knowwellapplicationofLSIandMSI.Setupsolidfoundationfordigitalsystems’analysis,designandapplication.II.ContentsandProfile1.Introduction1.1AboutDigitalDesign1.2AnalogversusDigital1.3DigitalDevices1.4ElectronicAspectsDigitalDesign1.5SoftwareAspectsDigitalDesign1.6IntegratedCircuitsObjectives:Mastertheconceptsandcharacteristicsofdigitalsignalanddigitaldevice;Knowsoftwaremethodsofdegitaldesign.2.NumberSystemsandCodes2.1PositionalNumberSystems2.2OctalandHexadecimalNumbers2.3GeneralPositional-Number-SystemConversions2.4BCDCode2.5GrayCode2.6CharacterCodes2.7CodesforActions,Conditions,andStatesObjectives:Masterdefinitionofnumbersystemsandtheirs’conversionsbetweeneachother.MastercodingmethodsofBCDCodeandGrayCode.Knowcodingpriciples.3.DigitalCircuits3.1LogicSignalsandGates3.2LogicFamilies3.3CMOSLogic3.4ElectricalBehaviorofCMOSCircuits-14-3.5OtherCMOSInputandOutputStructures3.6BipolarLogic3.7Transistor-TransistorLogic3.8CMOS/TTLInterfaceObjectives:MasterstructuresofCMOSandTTLgates;MasterCMOS/TTLInterface.4.CombinationalLogicDesignPrinciples4.1SwitchingAlgebra4.2Combinational-CircuitAnalysis4.3Combinational-CircuitSynthesis4.4TimingHazardsObjectives:MasterSwitchingAlgebra;MastermethodsofCombinational-CircuitAnalysisandSynthesis.Understandtiminghazards.5.CombinationalLogicDesignPractices5.1DocumentationStandards5.2CircuitTiming5.3CombinationalPLDs5.4Decoders5.5Encoders5.6Three-StateDevices5.7Multiplexers5.8Exclusive-ORGatesandParity5.9Comparators5.10Adders,Subtractors,andALUs5.11CombinationalMultipliersObjectives:MasterdesignmethodsofDecoders,Encoders,Three-StateDevices,Multiplexers,ParitycircuitsandComparators;KnowprinciplesofAddersandMultipliers.6.SequentialLogicDesignPrinciples6.1BistableElements6.2LatchesandFlip-Flops6.3ClockedSynchronousState-MachineAnalysis6.4ClockedSynchronousState-MachineDesign6.5DesigningStateMachinesUsingTransitionLists6.6AnotherState-MachineDesignExampleObjectives:MasterprinciplesandcharacteristicsofnormalLatchesandFlip-Flops;-15-MastermethodsofClockedSynchronousState-Machineanalysisanddesign.7.SequentialLogicDesignPractices7.1Sequential-CircuitDocumentationStandards7.2LatchesandFlip-Flops7.3SequentialPLDs7.4Counters7.5ShiftRegisters7.6SynchronousDesignMethodologyObjectives:Masterprinciplesandapplicationsofnormalcountersandshiftregisters.8.MemoryCPLDsandFPGAs8.1Read-OnlyMemory8.2Read/WriteMemory8.3StaticRAM8.4DynamicRAM8.5CPLD8.6FPGAObjectives:MasterprinciplesofROMandRAM;KnowprinciplesofCPLDandFPGA.9.Generationandtransformofpulsewaveform9.1Astablemultivibrator9.2Monostab
本文标题:电子信息工程专业课程教学大纲-课程教学大纲
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