DSP28335教程附录5浮点运算单元

Floating-PointUnitCopyright©2009TexasInstruments.Allrightsreserved.TechnicalTrainingOrganizationTTOAppendixETMS320C28x™MCUWorkshopLearningObjectivesArchitecture–floating-pointformat,registers,andpipelineInstructions–instructiontypes,delayslots,parallelinstructions,RPTB,floating-pointflagsInstructionSummaryIEEESingle-PrecisionFloating-PointFormat*NormalPositiveandNegativeValuesareCalculatedas:(-1)sx2(E-127)x1.M+/-~1.7x10-38to+/-~3.4x10+38TheNormalizedIEEEnumbershaveahidden1;thustheequivalentsignedintegerresolutionisthenumberofmantissabits+sign+123-bitMantissa(ImplicitLeadingBit+FractionBits)8-bitExponent(Biased)1SignBit(0=Positive,1=Negative)SEMSEMValue0100PositiveorNegativeZero010Non-ZeroDenormalizedNumber011-2540-0x7FFFFPositiveorNegativeValues*01255(max)0PositiveorNegativeInfinity01255(max)Non-ZeroNotaNumber(NaN)IEEESingle-PrecisionFloating-PointFormat(IEEE754)Mostwidelyusedstandardforfloating-pointStandardnumberformats,Specialvalues(NaN,Infinity)Roundingmodes&floating-pointoperationsUsedonmanyCPUsSimplificationsfortheC28xfloating-pointunitFlags&CompareOperations:NegativezeroistreatedaspositivezeroDenormalizedvaluesaretreatedaszeroNot-a-number(NaN)istreatedasinfinityRound-to-ZeroModeSupported(truncate)Round-to-NearestModeSupported(even)TheseformatsarecommonlyhandledthiswayonembeddedprocessorsC28xCPUandFPURegistersACCPXTXAR0XAR1XAR2XAR3XAR4XAR5XAR6XAR7PCRPCDPSPST0ST1IERIFRDBGIERC28RegisterSetR0HR1HR2HR3HR5HR6HR7HR4HSTFFPURegistersRB32-bit8FPUResultRegistersFPUStatusRepeatBlock32-bitAccumulatorProductTemporary8Auxiliary22-bitProgramCounterReturnPC16-bitDataPagePointerStackPointer2StatusInterruptEnableInterruptFlagR0H–R7HandSTFareshadowedforfastcontextsaveandrestoreExtendedforFPUStandardC28xCPUFloating-PointUnitPipelineF1F2D1D2R1R2EWC28xPipelineFetchDecodeReadExeWriteDRE1E2/WFPUInstructionLoadStoreNorequireddelayslotinstruction1requireddelayslotinstructionCMP/MIN/MAX/NEG/ABSMPY/ADD/SUB/MACF32Floating-pointoperationsarenotpipelineprotectedSomeinstructionsrequiredelayslotsfortheoperationtocompleteInsertNOPsorothernon-conflictinginstructionsbetweenoperationsFloating-PointUnitPipelineDelaySlotsInstructionsrequiringdelayslotshavea‘p’aftertheircyclecount2pstandsfor2pipelinedcyclesAnewinstructioncanbestartedoneachcycleTheresultisvalidonly2instructionslaterAssemblerissueserrorsforpipelineconflictsFilldelayslotswithnon-conflictinginstructionstoimproveperformance3generalguidelines:*Note:MOV32betweenFPUandCPUregistersisaspecialcaseMathMPYF32,ADDF32,SUBF32,MACF322pcyclesOnedelayslotConversionI16TOF32,F32TOI16,F32TOI16R,etc…2pcyclesOnedelayslotEverythingElse*Load,Store,Compare,Min,Max,AbsoluteandNegativevalueSinglecycleNodelayslotFloating-PointInstructionFormatSameinstructionformatasthefixed-pointinstructionsDestinationoperandisalwaysontheleftDestinationSourceOperandsFixed-Point:MPYACC,T,loc16Floating-Point:MPYF32R0H,R1H,R2HToenablefloating-pointonthe5.xcompilerusetheswitch:--float_support=fpu32TypesofFloating-PointInstructions(1of2)TypeExampleCyclesLoad(Conditional)MOV32R0H,mem32{,CONDF}1StoreMOV32mem32,R1H1LoadWithDataMoveMOVD32R3H,mem321FPURegisterTo28xRegisterMOV32XAR6,R2H1*28xRegisterToFPURegisterMOV32R3H,XAR71*Compare,Min,MaxCMPF32R2H,R3H1Absolute,NegativeValueABSF32R2H,R3H1ContextSaveSAVE1UnsignedIntegerToFloatUI16TOF32R1H,mem322pIntegerToFloatI32TOF32R1H,mem322pFloatToInteger&RoundF32TOI16RR2H,R1H2pFloatToIntegerF32TOI32R2H,R1H2p*MovesbetweenCPUandFPUregistersrequireadditionalpipelinealignmentTypesofFloating-PointInstructions(2of2)TypeExampleCyclesMultiply,Add,Subtract,MACMPYF32R2H,R1H,R0H2p1/X(16-bitAccurate)EINVF32R2H,R1H2p1/Sqrt(x)(16-bitAccurate)EISQRTF32R3H,R0H2pRepeatMACRPT(#N-1)||MACF32R7H,R3H,mem32,*XAR7++2p+NMinorMax&ParallelMoveMINF32RaH,RbH||MOV32RcH,RdH1/1Multiply&ParallelAddorSubtractMPYF32R2H,R1H,R0H||ADDF32R4H,R4H,R2H2p/2pMultiply,Add,Subtract,MAC&ParallelLoadMPYF32R2H,R1H,R0H||MOV32R0H,mem322p/1Multiply,Add,Subtract,MAC&ParallelStoreMPYF32R2H,R1H,R0H||MOV32mem32,R0H2p/1MathOperationsMPYF32R2H,R1H,R0HMPYF32R2H,R1H,R0H;2pinstructionNOP;1cycledelay;-MPYF32completes,R2Hvalidanyinstruction;CanuseR2H;MPYF32R2H,R1H,R0H;2pinstructionNOP;1cycledelayforMPYF32;-MPYF32completes,R2Hvalidanyinstruction;CanuseR2H;;MPYF32R2H,R1H,R0H;2pinstructionADDF32R3H,R3H,R1H;1cycledelayforMPYF32;-MPYF32completes,R2HvalidNOP;1cycledelayforADDF32;-ADDF32complete,R3Hvalid;MPYF32R2H,R1H,R0H;2pinstructionADDF32R3H,R3H,R1H;1cycledelayforMPYF32;-MPYF32completes,R2HvalidMOV32*XAR7,R2H;1cycledelayforADDF32;-ADDF32complete,R3Hvalid;MPYF32R2H,R1H,R0H;2pinstructionADDF32R3H,R3H,R1H;1cycledelayforMPYF32;-MPYF32completes,R2HvalidMOV32*XAR7,R2H;1cycledelayforADDF32;-ADDF32complete,R3Hvalid;-MOV32completeMathOperations:2p(2pipelined)cyclesCanbelaunchedeverycycleResultisvalid2instructionslaterMoveOperation:1cycleParallelInstructionsInstructionExampleCyclesMultiply&ParallelAdd/SubtractMPYF32RaH,RbH,RcH||SUBF32RdH,ReH,RfH2p/2pMultiply,Add,Subtract,Mac&ParallelLoad/StoreADDF32RaH,RbH,RcH||MOV32mem32,ReH2p