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12345678ABCD87654321DCBATitleNumberRevisionSizeA2Date:22-May-2015SheetofFile:C:\DocumentsandSettings\owner\桌面\317光纤\CH317AF\CH317AF.DDBDrawnBy:C230.1uFC320.1uFAVDD33L2BLM11A601S3.3VPowerC340.1uFC350.1uFVDD33_VDD251.05VPowerVDDREG3V3R100L3BLM11A601S3V3_UC210.1uFDVDD33R220CVDD331V8C1310uF3V3C40.1uFVIN3GND1VOUT2U3CE6219_1V8C60.1uF3V3C1210uF5VC1520pFHot!!!RUN1FB/VOUT5SW3VIN4GND2U2CE8502AML43.3uHR2510KR262.2KC30.1uFC50.1uF1.8VPowerPowerC180.1uFC190.1uFC220.1uFC100.1uFCVDD33C250.1uFC260.1uFC270.1uFC280.1uFC290.1uF1V8C240.1uFD+8GND10VCC3322RXDV18RXD115MOD038MDIO37VCC3331RXCK21GND20TXD233RXD216MDC36TXD332VCC33U4D-7RES6GND5VCC33U9VCC1812RXD014RXD317NC.23VCC1819GND30VCC1829TXEN28TXD134TXD035MOD242XO3TXCK27NC.26GND25NC.24GND44GND13VCC1811XI2VCC181VCC3343VCC3341GND40VCC1839U1CH317QETH1_TXD0ETH1_TXD1ETH1_TXD2ETH1_TXD3J1-MOD0:OPEN=UPPER;SHORT=DOWNMOD2R3NCGNDCVDD331V81V81V81V81V81V8CVDD33CVDD33CVDD33GNDGNDGNDGNDGNDGNDGNDX130MHzC120pC220pXIXOXOXI3V3_UC440.1uFD-D+R512k3V3_UETH1_RXD0ETH1_RXD1ETH1_RXD2ETH1_RXD3ETH1_RXENETH1_RXCETH1_TXENC720pF(NC)ETH1_MDCETH1_MDIOMOD0R14K7J12-JUMPR70R90MDCMDIOETH1_TXCC110.1uFPA416RST1PA24V35UD+6UD-7GND8PA02PB714PA13PB512XO10XI9PB613VCC15PB311U5CH536GETH1_MDCETH1_MDIOR232KCVDD33CVDD33MDCMDIOC160.1UFC170.01UFCVDD33TST1J2D-D+RTL8211DNLED0_AD0LED1_AD1RXD5_TXDLYRXD4_SELRGVRXER_AN1RXD7_AN0RXD6_RXDLYDVDD10TXD2PHYRSTBDVDD33TXD1TXD3TXD0CRS_MII_1GTX_CLKTXENCOL_MII_0DVDD10HSONAVDD10AVDD10AVDD10GNDHSINGNDHSIPAVDD33HSOPGNDAVDD10LED3_MDI_1MDIOREGOUTDVDD33XTAL2CLK125AVDD33LED2_MDI_0GNDLED1_AD1XTAL1GNDRSETMDCLED0_AD0AVDD10RXD5_TXDLYRXD3RXD7_AN0RXD0VDD33_VDD25AVDD33RXENGNDRX_CLKRXD1RXER_AN1VDD33_VDD25REXTRXD2REGV15AVDD10RXD6_RXDLYGNDLED3_MDI_1REGV15VDD33_VDD25COL_MII_0CRS_MII_1LED2_MDI_0LED3_MDI_1GNDTX_PHSOPHSONTX_NHSIPHSINVDDREG1T1CON1RXD4_SELRGVR574.7KR594.7KRTL8211DNMDIP01MDIN02AVDD103MDIP14MDIN15AVDD336MDIP27MDIN28AVDD109MDIP310MDIN311AVDD1012HSIP13HSIN14REGV1524AVDD3325NC29NC30NC31RXDV32RXD033DVDD3334RXD135RXD236RXD337RXC38RXD4/SELRGV39DVDD3340RXD5/TXDLY41RXD7/AN[0]43RXER/AN[1]44COL/MII[0]45CRS/MII[1]46DVDD1047TXEN49TXD050DVDD3351PHYRSTB52TXD153TXD254AVDD1023REXT26NC28TXD355TXCLK56TXD457TXD558TXD659TXD760TXER61TMS62TCK63RXD6/RXDLY42GTX_CLK48AVDD1016AGND15HSOP17HSON18AGND19AGND20HSON_CK21HSOP_CK22AGND27TDO64TDI65DVDD1066DVDD3367LED0_PHYAD[0]68LED1_PHYAD[1]69LED2_MDI[0]70LED3_MDI[1]71MDC72MDIO73PME74INT75NC76ENSWREG77RSET78AVDD1079AVDD3380CKXTAL181CKXTAL282GND83VDDREG84VDDREG85CLK12586GND87REG_OUT88GND89RTL8211DNR714.7KR604.7KR17510R684.7KDVDD33R321.5KC42.1uFDVDD33R464.7KR534.7K12X225MHz-D-49SR790C5427pFC5527pFC33.1uFC5110UXTAL2XTAL1R7412K-1%R614.7KR584.7KR312.49K-1%R704.7KRGMIIInterfaceD2LED3R694.7KGTX_CLKETH1_TXC12C50.1uFC20100pF-NCC5322p(NC)ETH1_TXD3R674.7KETH1_TXD2ETH1_TXD1ETH1_TXD0ETH1_TXENDVDD33TXD3TXD2TXD1TXD0TXENRX_CLKETH1_RXCC5222p(NC)R3533ETH1_RXD3ETH1_RXD2ETH1_RXD1ReserveforEMI.ETH1_RXD0R68,R69:NWay,ConfigforallcapabilityR67:3.3VGMII/RGMIIR54:2.5VGMII/RGMIIR57,R59:TX/RXDelay(OnlyforRGMIImode)RXD3RXD2RXD1RXD0C51/C50Closetopin24ConfigurationFibermodepowerpinLEDR71,R60:RGMIIModeMII[1:0]=01R70,R61:FiberModeMDI[0:1]=00Thedetailconfigurationsettingpleaserefertodatasheet.R58,R53:PHYAddress=10Note3:ThetracewidthfromC50toPin24mustbe20milsETH1_RXENFibermodeLEDMDI1=0:R79,R17RXENC47.1uFC48.1uFRX_NRX_PC5710uFC5610UFTX_NTX_PRX_NRX_P5VL6100mHL5100mHC43104C49104RXGND1OUT+2OUT-3SIGNALDET4RXVCC5TXVCC6DIN-7DIN+8TXGND9FMIPT8351R784K7UV1D-2D+3GND4GND5GND6P1USBR19Fuse/1A5VC910uF12P2GNDD-D+R110123P33HEADC590.1uFC600.1uFC580.1uFVcc=5V,R41=R42=68Ω,R42=R44=180Ω,R38=R39=270Ω。Vcc=3.3V,R41=R42=82Ω,R42=R44=130Ω,R38=R39=180Ω。在实际应用中,+5V供电时,R38、R39可以从270Ω到350Ω之间选取;+3.3V供电时,R38、R39可以从142Ω到200Ω之间选取,原则是让输出波形达到最佳。SD为PECL电平时,R78=2K。GNDS-FiberConverterUSBCH317SGMIICH9317Note4:closetoPINRX_CLKR3603V3R370(NC)R44180(NC)R43180(NC)R4168(NC)R38270(NC)R39270(NC)R4268(NC)R120(NC)ENSWREGR40VDDREGENSWREGEnableSWREG:R12,R8DisableSWREG:R4,R6当使用PHY自供电时,需要开启SWREGSWREGAVDD10C4533uF3V3C1420pFHot!!!RUN1FB/VOUT5SW3VIN4GND2U6CE8502AML13.3uHR211.5KR242KC80.1uFC360.1uFC380.1uFC400.1uFC390.1uFC410.1uFAVDD10DVDD10R20C370.1uFC610.1uFC620.1uFL74.7uH-700mA(NC)REGOUTR60R80(NC)Note2:TheTracelengthbetweenL7andPHY'sPin88(REGOUT)mustbewithin0.5cm.C45andC36toL7mustbewithin0.5cm.Note1:TheTracelengthfromC59,C60toPin84(VDDREG)mustbewithin0.5cm.ThetracewidthfromAVDD33toPin84should40mils.
本文标题:USB2.0延长控制芯片CH317光纤延长原理图
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