ARM指令速查手册

ARMInstructionSetQuickReferenceCardKeytoTables{cond}RefertoTableConditionField{cond}a_mode2RefertoTableAddressingMode2Oprnd2RefertoTableOperand2a_mode2PRefertoTableAddressingMode2(Post-indexedonly)fieldsRefertoTablePSRfieldsa_mode3RefertoTableAddressingMode3{S}UpdatesconditionflagsifSpresenta_mode4LRefertoTableAddressingMode4(BlockloadorStackpop)C*,V*FlagisunpredictableaftertheseinstructionsinArchitecturev4andearliera_mode4SRefertoTableAddressingMode4(BlockstoreorStackpush)QStickyflag.Alwaysupdatesonoverflow(noSoption).ReadandresetusingMRSandMSRa_mode5RefertoTableAddressingMode5x,yBmeaninghalf-register[15:0],orTmeaning[31:16]reglistAcomma-separatedlistofregisters,enclosedinbraces({and})immed_8rA32-bitconstant,formedbyright-rotatingan8-bitvaluebyanevennumberofbits{!}Updatesbaseregisterafterdatatransferif!presentimmed_8*4A10-bitconstant,formedbyleft-shiftingan8-bitvaluebytwobits§RefertoTableARMarchitectureversionsOperation§AssemblerSupdatesQActionNotesMoveMoveMOV{cond}{S}Rd,Oprnd2NZCRd:=Oprnd2NOTMVN{cond}{S}Rd,Oprnd2NZCRd:=0xFFFFFFFFEOROprnd2SPSRtoregister3MRS{cond}Rd,SPSRRd:=SPSRCPSRtoregister3MRS{cond}Rd,CPSRRd:=CPSRregistertoSPSR3MSR{cond}SPSR_fields,RmSPSR:=Rm(selectedbytesonly)registertoCPSR3MSR{cond}CPSR_fields,RmCPSR:=Rm(selectedbytesonly)immediatetoSPSR3MSR{cond}SPSR_fields,#immed_8rSPSR:=immed_8r(selectedbytesonly)immediatetoCPSR3MSR{cond}CPSR_fields,#immed_8rCPSR:=immed_8r(selectedbytesonly)ArithmeticAddADD{cond}{S}Rd,Rn,Oprnd2NZCVRd:=Rn+Oprnd2withcarryADC{cond}{S}Rd,Rn,Oprnd2NZCVRd:=Rn+Oprnd2+Carrysaturating5EQADD{cond}Rd,Rm,RnQRd:=SAT(Rm+Rn)Noshift/rotate.doublesaturating5EQDADD{cond}Rd,Rm,RnQRd:=SAT(Rm+SAT(Rn*2))Noshift/rotate.SubtractSUB{cond}{S}Rd,Rn,Oprnd2NZCVRd:=Rn-Oprnd2withcarrySBC{cond}{S}Rd,Rn,Oprnd2NZCVRd:=Rn-Oprnd2-NOT(Carry)reversesubtractRSB{cond}{S}Rd,Rn,Oprnd2NZCVRd:=Oprnd2-RnreversesubtractwithcarryRSC{cond}{S}Rd,Rn,Oprnd2NZCVRd:=Oprnd2-Rn-NOT(Carry)saturating5EQSUB{cond}Rd,Rm,RnQRd:=SAT(Rm-Rn)Noshift/rotate.doublesaturating5EQDSUB{cond}Rd,Rm,RnQRd:=SAT(Rm-SAT(Rn*2))Noshift/rotate.Multiply2MUL{cond}{S}Rd,Rm,RsNZC*Rd:=(Rm*Rs)[31:0]accumulate2MLA{cond}{S}Rd,Rm,Rs,RnNZC*Rd:=((Rm*Rs)+Rn)[31:0]unsignedlongMUMULL{cond}{S}RdLo,RdHi,Rm,RsNZC*V*RdHi,RdLo:=unsigned(Rm*Rs)unsignedaccumulatelongMUMLAL{cond}{S}RdLo,RdHi,Rm,RsNZC*V*RdHi,RdLo:=unsigned(RdHi,RdLo+Rm*Rs)signedlongMSMULL{cond}{S}RdLo,RdHi,Rm,RsNZC*V*RdHi,RdLo:=signed(Rm*Rs)signedaccumulatelongMSMLAL{cond}{S}RdLo,RdHi,Rm,RsNZC*V*RdHi,RdLo:=signed(RdHi,RdLo+Rm*Rs)signed16*16bit5ESMULxy{cond}Rd,Rm,RsRd:=Rm[x]*Rs[y]Noshift/rotate.signed32*16bit5ESMULWy{cond}Rd,Rm,RsRd:=(Rm*Rs[y])[47:16]Noshift/rotate.signedaccumulate16*165ESMLAxy{cond}Rd,Rm,Rs,RnQRd:=Rn+Rm[x]*Rs[y]Noshift/rotate.signedaccumulate32*165ESMLAWy{cond}Rd,Rm,Rs,RnQRd:=Rn+(Rm*Rs[y])[47:16]Noshift/rotate.signedaccumulatelong16*165ESMLALxy{cond}RdLo,RdHi,Rm,RsRdHi,RdLo:=RdHi,RdLo+Rm[x]*Rs[y]Noshift/rotate.Countleadingzeroes5CLZ{cond}Rd,RmRd:=numberofleadingzeroesinRmLogicalTestTST{cond}Rn,Oprnd2NZCUpdateCPSRflagsonRnANDOprnd2TestequivalenceTEQ{cond}Rn,Oprnd2NZCUpdateCPSRflagsonRnEOROprnd2ANDAND{cond}{S}Rd,Rn,Oprnd2NZCRd:=RnANDOprnd2EOREOR{cond}{S}Rd,Rn,Oprnd2NZCRd:=RnEOROprnd2ORRORR{cond}{S}Rd,Rn,Oprnd2NZCRd:=RnOROprnd2BitClearBIC{cond}{S}Rd,Rn,Oprnd2NZCRd:=RnANDNOTOprnd2NooperationNOPR0:=R0Flagsnotaffected.Shift/RotateSeeTableOperand2.CompareCompareCMP{cond}Rn,Oprnd2NZCVUpdateCPSRflagsonRn-Oprnd2negativeCMN{cond}Rn,Oprnd2NZCVUpdateCPSRflagsonRn+Oprnd2VectorFloatingPointInstructionSetQuickReferenceCardKeytoTables{cond}SeeTableConditionField(onARMside).{E}E:raiseexceptiononanyNaN.WithoutE:raiseexceptiononlyonsignalingNaNs.S/DS(singleprecision)orD(doubleprecision).{Z}Roundtowardszero.OverridesFPSCRroundingmode.S/D/XAsabove,orX(unspecifiedprecision).VFPregsAcommaseparatedlistofconsecutiveVFPregisters,enclosedinbraces({and}).Fd,Fn,FmSd,Sn,Sm(singleprecision),orDd,Dn,Dm(doubleprecision).VFPsysregFPSCR,orFPSID.OperationAssemblerExceptionsActionNotesVectorarithmeticMultiplyFMULS/D{cond}Fd,Fn,FmIO,OF,UF,IXFd:=Fn*FmnegativeFNMULS/D{cond}Fd,Fn,FmIO,OF,UF,IXFd:=-(Fn*Fm)accumulateFMACS/D{cond}Fd,Fn,FmIO,OF,UF,IXFd:=Fd+(Fn*Fm)deductFNMACS/D{cond}Fd,Fn,FmIO,OF,UF,IXFd:=Fd-(Fn*Fm)ExceptionsnegateandaccumulateFMSCS/D{cond}Fd,Fn,FmIO,OF,UF,IXFd:=-Fd+(Fn*Fm)IOInvalidoperationnegateanddeductFNMSCS/D{cond}Fd,Fn,FmIO,OF,UF,IXFd:=-Fd-(Fn*Fm)OFOverflowAddFADDS/D{cond}Fd,Fn,FmIO,OF,IXFd:=Fn+FmUFUnderflowSubtractFSUBS/D{cond}Fd,Fn,FmIO,OF,IXFd:=Fn-FmIXInexactresultDivideFDIVS/D{cond}Fd,Fn,FmIO,DZ,OF,UF,IXFd:=Fn/FmDZDivisionbyzeroCopyFCPYS/D{cond}Fd,FmFd:=FmAbsoluteFABSS/D{cond}Fd,FmFd:=abs(Fm)NegativeFNEGS/D{cond}Fd,FmFd:=-FmSquarerootFSQRTS/D{cond}Fd,FmIO,IXFd:=sqrt(Fm)ScalarcompareFCMP{E}S/D{cond}Fd,FmIOSetFPSCRflagsonFd-FmUseFMSTATtotransferflags.ComparewithzeroFCMP{E}ZS/D{cond}FdIOSetFPSCRflagsonFd-0UseFMSTATtotransferflags.ScalarconvertSingletodoubleFCVTDS{cond}Dd,SmIODd:=convertStoD(Sm)Doubletos